IPS15C Datasheet by Microsemi PoE Ltd.

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DatasheetRev.12 - Low cost, High Efficiency, Low Power off-line Switcher
© Copyright 2003-2007 - ASIC Advantage, Inc. – All rights reserved - Revision 12 – April 02, 2007 1 / 15
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INTRODUCTION
DESCRIPTION
The IN-PLUG
®
IPS15 is an enhanced off-line
switcher version of the IPS10. It includes additional
features such as soft start and over-voltage limiting.
As the IPS10, the IPS15 Integrated Circuit was
especially designed for low-cost, high efficiency, low-
power fly-back off-line switching power supplies up
to approximately 50 to 70W. It contains a shunt-
regulator, a precision oscillator, a PWM with its
associated comparator and loop compensation
components as well as all the necessary biasing and
protection circuitry (thermal shutdown, under-voltage,
over-voltage and over-current).
It is optimized to operate with an optocoupler to
provide the feedback from the secondary but can also
be used with a bias winding which could sometimes
be more economical.
Typical applications include domestic and
international power supplies featuring AC input
ranging from 90 to 264V and DC from 100 to 350V.
In addition to being a low-cost IC, the IPS15 allows
further cost reduction for the complete power supply
thanks to:
- fewer and cheaper associated components
- a simpler, cheaper and more forgiving fly-back
transformer.
For very low power applications the IPS15 can be
powered from the rectified AC through a simple
resistor.
For higher power applications, the IPS15 is powered
through a novel patented network which replaces the
usual snubber network. AAI will grant one non-
exclusive royalty free licence to use this arrangement
for each IPS15 purchased by Customers, either
directly from the company or through approved
sources.
The IN-PLUG
®
IPS15 can drive a large variety of
power MOSFETs hence providing the maximum
flexibility at the lowest possible cost.
FEATURES
Lowest cost solution for low-power off-line
flyback applications.
High performance yet forgiving.
Simple, less critical, lower cost transformer.
Wide range PWM for stable operation at any load
and line voltage.
Suitable for constant-power applications.
Operates with optocoupler or bias winding for
constant voltage applications: zeners, adjustable
shunt regulator like TL431 or dedicated feedback
controllers like AAI precision IPS22 & IPS25.
EMI reduction in critical applications thanks to:
Adjustable operating frequency.
Separate MOSFET N & P drives
Power shut-down for stand-by modes.
Cycle to cycle over-current protection
Under-voltage and over-voltage protection.
External component savings: MOV, X-cap, Y-cap
(ESD/lightning permitting)
APPLICATIONS
Standby power supplies for TV, VCR and IR
remotely-controlled appliances.
Cordless and feature phones.
Cellular phone chargers.
Power tools fast chargers with trickle and on/off.
Laptops and personal digital assistants.
Utility meters.
Replacements for bulky plug-in transformers.
PIN CONFIGURATION: DIP-8 / SOIC-8
IN-PLUG® series: I
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Low Cost, High Efficiency, Low Power
Enhanced Off-line Switcher
PDRIVE NDRIVE
ISENSE
VCC
RBIAS OVERV
OPTO
GND
IPS15
1
45
8
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DatasheetRev.12 - Low cost, High Efficiency, Low Power off-line Switcher
© Copyright 2003-2007 - ASIC Advantage, Inc. – All rights reserved - Revision 12 – April 02, 2007 2 / 15
FUNCTIONAL BLOCK DIAGRAM
TYPICAL APPLICATION SCHEMATIC: AC IN 110V, 5W OUTPUT, zener regulation (EMC components not
shown).
Figure 1
REF2
Bandgap
reference
_
_
+
+
RQ
S
RBIASGND NDRIVE
OVERV
ISENSE
OPTO
VCC
UNDER
V
OLTAGE
LOCKOUT
THERMAL
SHUTDOWN
ENB
PWM
COMPARATORS
CURRENT
LIMITING
OSCILLATOR
SHUNT
REGULATOR
FILTERS
REF3
OVER
V
OLTAGE
LOCKOUT
ENB
REF1
SOFT START
PDRIVE
V
CC
GND
Q1
NMOSFET
1A, 600V
U2
OPTO-NPN
R6
100
D2
1N4148
D3
1N4148
R4
1.2
R3
470
1/2W
C4
100pF
1KV
3 1
42
BR1
BRIDGE
L1
4.2 uH OUT+
OUT-
SecondaryGND
PrimaryGND
R2
820k
110V AC
Snubber Network
Patented
TR1
TRANSF-1P1S
LP=1.5mH, LS= 1.5microH
+
C5
470uF
16V
+
C6
220uF
16V
+
C3
22uF
16V
+
C1
10uF
250V
D4
Zener
9.2V
D1
Schottky
5A - 60V
R5
330k
R1
4.3k
R1A
1.5k
R8
100k
R7
10Meg
1/4W
PDRV
1
ISENSE
2
VCC
3
RBIAS
4
NDRV 8
GND 7
OPTO 6
OVRV 5
U1
IPS15
C2
220pF
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DatasheetRev.12 - Low cost, High Efficiency, Low Power off-line Switcher
© Copyright 2003-2007 - ASIC Advantage, Inc. – All rights reserved - Revision 12 – April 02, 2007 3 / 15
IN-PLUG
®
IPS15 SERIES FUNCTIONAL DESCRIPTION
The IPS15 is a PWM controller for fly-back switching power supply applications. It has been optimized to reduce
the external component count. The principal features are:
- Low start Current.
- Shunt regulator to allow the maximum flexibility to power the chip.
- Protections against overheating, under-voltage and over-voltage.
- Precise oscillator with externally adjustable frequency.
- On-chip filters for the loop compensation and the over-current sensing.
- Soft start and over-voltage shut-down to protect the MOSFET.
- Separate MOSFET P and N drivers to adjust rising and falling edge independently.
The shunt regulator operates like a zener diode, keeping the chip supply voltage around 9.5 volts. At start-up the
chip stays in stand-by mode until the voltage of VCC reaches about 9.5 volts. During this phase, the consumption is
of the order of 120 μA. When the 9.5 volts are reached, the driver starts providing gate pulses. The chip will go back
to the stand-by mode if the supply voltage decreases down to ~8 volts. The overall chip consumption in normal
operation is about 600 μA, not counting the current required to drive the MOSFET gate.
For domestic application, the chip can be supplied from the rectified line voltage through a resistor. In such case, the
resistor has to be sized to drive enough current to the chip.
For international applications, the IC gets the start current from a resistor connected to the rectified line voltage
(~150 μA) then, after the first gate pulse, the patented modified snubber network (*) provides the additional current
to keep the chip running.
The opto pin is pulled to VCC through an internal resistor, allowing a maximal duty cycle of 60 %. During start-
up, the duty cycle is controlled by the internal soft start unit which smoothly increases the MOSFET current up to its
maximum, corresponding to 700mV developped across the sense resistor.
When the expected output voltage is reached, the optocoupler's led is driven, and the opto pin voltage decreases,
reducing the duty cycle to a controlled value. The current limiting protection operates by turning-off the MOSFET
when the ISENSE pin voltage exceeds ~700 mv. This ensures a cycle to cycle protection of the MOSFET and
provides a mean of operating the power supply in constant-power mode.
The voltage limiting protection operates by turning-off the MOSFET when the OVERV pin voltage exceeds 4V.
(*) US Patent # 6,233,165 - Royalty free licence for IN-PLUG
®
Customers.
PIN DESCRIPTION
Number Name Description
1 PDRIVE Internal P drive terminal to be connected to the gate of the outside power
MOSFET. (The rising edge can be adjusted with an external resistor)
2I
SENSE
MOSFET current sensing. Any voltage over 700 mv @ 25°C on this pin
will stop gate pulses.
3V
CC
IC positive supply. The chip behaves like a 9.5 volts zener diode.
4R
BIAS
External R
BIAS
connection to set the operating frequency.
5 OVERV Over-voltage lock-out pin. @ 25°C a voltage over 4V on this pin will pull
the MOSFET gate to GND.
6OPTO
Feedback input
7GND
Ground
8 NDRIVE Internal N drive terminal to be connected to the gate of the outside power
MOSFET. (The falling edge can be adjusted with an external resistor)
w w w M w w .m w m Alb—MMM WAAHJ‘H
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DatasheetRev.12 - Low cost, High Efficiency, Low Power off-line Switcher
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AC 110V- IPS15 operations at medium load (5W)* IPS15 operations at heavy load (15W)*
AC 250V - IPS15 operations at medium load (5W)* IPS15 operations at heavy load (15W)*
*
Together with a 1A, 600V MOSFET.
OUTPUT POWER CAPABILITY
Part Number Package 230V AC or 115V AC w/ Doubler 85 – 285V AC
IPS15 DIP-8 / SOIC-8 Up to 70W (1) Up to 30W (1)
Note (1): Governed by size and package of external MOSFET
Vout
Drain
Isense
Vout
Isense
Drain
Vout
Isense
Drain
Vout
Isense
Drain
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DatasheetRev.12 - Low cost, High Efficiency, Low Power off-line Switcher
© Copyright 2003-2007 - ASIC Advantage, Inc. – All rights reserved - Revision 12 – April 02, 2007 5 / 15
ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATING
Characteristics Value UNITS
Shunt regulator max I
CC
(pin 3) - see fig 4- 50 mA
All analog inputs (pin 2, 4, 5, 6) Min= -0.3, Max= +6.3V V
Peak drive output current (pin1) Source=100, Sink=170 mA
Junction to case thermal resistance R
θJ-C
PDIL = 42, SOIC = 45
Junction to PCB thermal resistance R
θJ-A
PDIL = 125, SOIC =155 °C / W
Power dissipation for T
A
<= 70°C PDIL = 640, SOIC = 500 mW
Operating junction temperature - 40 to 150
Storage temperature range - 55 to 150
Lead temperature (3 mm from case for 5 sec.) 260
°C
PARAMETER TEST CONDITIONS PARAMETERS UNITS
@ 25°C unless specified MIN. TYP. MAX.
Supply, bias & circuit protection
Shunt regulator voltage ICC = 1 to 30 mA 9.2 9.7 10.5 V
Shunt regulator dynamic
resistance (see Fig. 4) 1 to 30 mA 2 3 5 Ω
Shunt regulator max peak
repetitive current -35- mA
Min I
CC
to start oscillator - - 140 μΑ
Under voltage lock-out V
CC
– 2.2 V
CC
- 1.5 V
CC
- 1.4 V
Min I
CC
to ensure continuous
operation 1A, 600V, 5 nC MOSFET 1.1
@ 20KHz
3.2
@
80KHz
4.9
@ 150KHz
mA
Current limiting sensing
voltage 655 700 745 mV
Temperature coefficient of
current limiting --50 μV/°C
Overvoltage sensing voltage 3.85 4 4.15 V
Soft/start duration 0 to 700mV - 20 - clock cycles
Leading edge blanking 200 - 450 ns
Thermal shutdown trip
temperature - 150 - °C
Oscillator & PWM
Range of operating
frequencies 30 80 150 KHz
RBIAS values for above
frequencies (see figure 2) 550 170 80 KΩ
Oscillator stability with
supply & temperature
(see figure 3 for average)
I
CC
= 5 mA
Temp = 0 to 70°C -1.5 - 1.5 %
Maximum duty cycle - 66 - %
Minimum duty cycle - 0 - %
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DatasheetRev.12 - Low cost, High Efficiency, Low Power off-line Switcher
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ELECTRICAL CHARACTERISTICS (cont’d)
PARAMETER TEST CONDITIONS PARAMETERS UNITS
@ 25°C unless specified MIN. TYP. MAX.
Error amplifier
Sensitivity in mV / % of PWM - 54 95 mV
Voltage for max duty cycle OPTO pin - 4 - V
Voltage for min duty cycle OPTO pin - 0.5 - V
Input impedance OPTO pin - 60 - KΩ
P & N Outputs to MOSFET gate
P gate driver saturation 10 mA (source) - - 1 V
N gate driver saturation 10 mA (sink) - - 0.6 V
Gate pull-down resistor (internal) 280 400 520 KΩ
PDRIVE Rise time (10% to
90%) 240 pF load - 250 - ns
NDRIVE Fall time (10% to
90%) 240 pF load - 100 - ns
Max recommanded total
external MOSFET charge @ 20 KHz - - 100 nC
@ 80 KHz - - 50 nC
@ 150 KHz - - 15 nC
Note: Electrical parameters, although guaranted, are not all 100% tested in production.
Figure 2: Frequency vs Rbias
10
30
50
70
90
110
130
150
170
190
0 50 100 150 200 250 300 350 400 450 500 550
Rbias (k Ohm)
Frequency (kHz)
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DatasheetRev.12 - Low cost, High Efficiency, Low Power off-line Switcher
© Copyright 2003-2007 - ASIC Advantage, Inc. – All rights reserved - Revision 12 – April 02, 2007 7 / 15
ORDERING INFORMATION
Figure 4 Shunt regulator Icc current
0
10
20
30
40
50
02468101214
Vcc (V)
Icc (mA)-
Figure 3 Frequency drift vs temperature
-2.00
-1.00
0.00
1.00
2.00
-20-100 102030405060708090100
Temperature (°C)
Frequency variation (%)
ICC=5mA
Part No. ROHS /
Pb-Free
Package
Temperature Range
IPS15C-D -G-LF 8-Pin PDIP 0°C to +70°CCommercial
IPS15I-D -G-LF 8-Pin PDIP -40°C to +85°CIndustrial
IPS15C-SO -G-LF 8-Pin SOIC 0°C to +70°CCommercial
IPS15I-SO -G-LF 8-Pin SOIC -40°C to +85°CIndustrial
For detailed orderin
information
see
a
e 14
|P515 and loan stabi y: Precaution in selecting the optocougler: Long stability with the TL431: Discontinuous ogeration:
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DatasheetRev.12 - Low cost, High Efficiency, Low Power off-line Switcher
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GOOD DESIGN PRACTICES
IPS15 and loop stability:
The IPS15 is intrinsically very fast and doesn’t participate to the loop stability. It only involves a comparator that
doesn’t bring any gain and exhibits a negligible phase shift.
It has been designed on purpose to allow its utilization in a large range of applications:
(a) Operating at frequencies up to 200 kHz and even above,
(b) Involving very different types of loop stability from "cycle skipping" where the loop is not compensated at all
(figure 1), to good stability achieved through the utilization of a TL431 (figure 5) and finally superior transient
response when using the IPS25 feedback controller (figure 6).
The loop compensation is entirely achieved on the load side and the feedback is performed by an optocoupler which
gain and dynamic response play an important role in the loop stability.
Precaution in selecting the optocoupler:
The optocoupler must be using a Phototransistor and NOT a Photodarlington. Most optocouplers of this type are
offered in a wide range of coupling efficiency, also called transfer ratio. Even the cheapest ones have a guaranteed
transfer ratio of the order of 100% meaning that 1mA of current in the IR LED creates approximately 1mA of
current in the receiving phototransistor. The user should be able to design the loop to be stable even though the
actual transfer ratio differs by more than a factor of 3 (example from 100% to 300% or 50% to 150%).
Unfortunately optocouplers were not designed for low-current applications and this results in very bad speed and
saturation characteristics for the phototransistor which could become incredibly slow and create severe loop stability
problems should it be allowed to saturate hard in the application (the optocoupler could cause the IPS15 to skip
cycles due to the long time required by the opto transistor to go out of saturation).
In the example of figure 5, the output voltage is 10 volts as defined by R15 and R16 and 2.5V at the Pin #1 of the
TL431. The cathode of the TL431 can go to a voltage as low as 2 Volts. The IR LED requires approximately 1 Volt
which means that the voltage drop across R14 could be up to 6 volts resulting in a maximum current of 700uA. This
value is plentiful for the utilization of a broad range of optocouplers and yet small enough to avoid hard saturation.
Loop stability with the TL431:
The TL431 has an enormous DC gain and will not ensure stability unless specific loop-compensation components
such as a RC network are added as indicated below.
The RC network should have a cut-off frequency at 100Hz to roll-off the gain at low frequencies but reach a
plateau around 100Hz and have enough AC gain at twice the line frequency and achieve a good line ripple
rejection.
This is achieved by the loop compensation network C7, R17 of figure 5. The gain rolls off until the impedance of
C7 reaches the value of R7. At much higher frequencies, the gain continue to roll-off due to the natural frequency
response of the TL431.
The goal is to reach a very low gain at the switching frequency.
If the addition of C7 & R17 with values as shown results in gain is too low, the values of R15 & R16 should be
reduced in proportion to lower the impedance at Pin #1 of TL 431. Alternately, if the gain is too high the values of
R17 should be reduced and C7 re-adjusted accordingly to maintain the required cut-off frequency.
Criteria to calculate the network :
1) R17 must be much higher than the input resistance of TL431 constituted by R16//R15=5K Æ 68Kohm OK.
2) F=100Hz=1/(2 x 3.14 x R17 x C7) gives approximately 22,000 pF for C7.
Discontinuous operation:
Check discontinuous mode of operation of the transformer (see application note AN-IPS02 page 2 for details)
to ensure that the Flyback SMPS is indeed operating in discontinuous mode in the entire range of Input Voltages
and Output Current. The response of the SMPS drastically changes in continuous mode, it gets considerably slower
which requires a totally different loop compensation technique. Remember that it is very difficult to ensure loop
MOSFET driver Erotect APPLICATION 2 APPLICATION 2
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DatasheetRev.12 - Low cost, High Efficiency, Low Power off-line Switcher
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stability with a simple schematic when the SMPS is allowed to transition between Discontinuous and Continuous
modes.
MOSFET driver protection:
The MOSFET driver has been sized to be capable of driving power MOSFETs featuring a total gate charge up to
100nC.
The MOSFET should be turned-on relatively slowly and turned-off much faster. As shown below, these 2
parameters can be independently adjusted through the external resistors R10 (pin1) and R10A (pin8).
The minimum value of these resistors should be 50Ω
in order
to reduce EMI and minimize the noise injection which could
result from Miller-capacitance kick-back during transient conditions.
See application note
AN-IPS-02 for EMI reduction techniques.
APPLICATION 2
:
AC IN 85-260V, 5 – 10W OUTPUT, voltage regulation with TL431.
Figure 5
APPLICATION 2
:
AC IN 85-260V, 0 – 5W OUTPUT, current & voltage regulation with IPS25.
Figure 6
Q1
NMOSFET
1A, 600V
U2
OPTO Q817C
R14
4.7K
D2
D3
2 x 1N4148
R4
2.2
SMT
R3
1K
1/2W
C4
120pF
600V
R5
330k
SMT
3 1
42
BR1
BRIDGE
OUT+
OUT-
SecondaryGNDPrimaryGND
R2A
430k
SMT
90V-270V AC
Snubber Network
Patented
TX1 EI/EE FERRITE
Noise-Canceling Type
LP=1.5mH
LS=1.5microH
+
C6
470uF
16V
+
C3
10uF
16V
+
C1
4.7uF
400V
D3
Schottky
1A - 60V
L1
330uH
+
C2
4.7uF
400V
R2
390k
SMT
R10
4.3k
SMT
R10A
1.5k
SMT
R11
100k
SMT
R12
10Meg
1/4W
C1
220pF
SMT
REF 1
K
3
A
2
U3
TL431
R15
10k
R16
10k
OUTPUT
C7 R17
Loop Compensation
PDRV
1
ISENSE
2
VCC
3
RBIAS
4
NDRV 8
GND 7
OPTO 6
OVRV 5
U4
IPS15
R15 and R16 to be adjusted according to output voltage
INPUT
R4 controls max pick current
when the ISENSE pin v oltage exceeds ~700 mv
R11 and R12 to be adjusted f or max line overv oltage protection
Q1
NMOSFET
1A, 600V
U3
OPTOCOUPLER
D1
D2
2 x 1N4148
R4
1.5
R3
1K
1/2W
C4
120pF
600V
3 1
42
BR1
BRIDGE
OUT+
OUT-
SecondaryGND
R2A
430k
SMT
90V-270V AC
Snubber Network
Patented
TX1 EI/EE FERRITE
13mm Noise-Canceling Type
LP=1.5mH, LS=1.5microH
+
C5
100uF
16V
105°C
+
C3
10uF
16V
+
C1
4.7uF
400V
D3
Schottky
1A - 60V
L1
330uH
+
C2
4.7uF
400V
R2
390k
R6
23.7k
1%
R7
25.5k
1%
OUTPUT
INPUT
R8
3.3
VCC
1
VSENSE
2
VCOMP
3
OPTO
4
ISENSE 8
N/C 7
ICOMP 6
GND 5
U2
IPS25
R9
30k
C9
0.068uF
C8
0.068uF
R1
10k
+
C6
470uF
16V
105°C
C10
220pF
R5
330k
PrimaryGND
R10
4.3k
R10A
1.5k
R11
100k
R12
10Meg
1/4W
PDRV
1
ISENSE
2
VCC
3
RBIAS
4
NDRV 8
GND 7
OPTO 6
OVRV 5
U1
IPS15
C1
220pF
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DatasheetRev.12 - Low cost, High Efficiency, Low Power off-line Switcher
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OUTPUT CORD SERIAL RESISTANCE COMPENSATION WITH THE IPS25 FEEDBACK CONTROLLER
Figure 7
The voltage drop due to the output serial resistance of the cord can be
compensated by adding a voltage positive feedback to the IPS25 input pin
VSENSE, proportional to Vdrop. This can be achieved either by splitting R8
(output current sensing resistor) in two or by inserting 2 serial resistors R13 and
R14 in parallel to R8 and connect the positive feedback to the intermediate node.
R13 and R14 should be calculated, based on the following conditions:
- (R13 + R14) 20 x R8 (but should remain low impedance in regards to R7),
- Vint ~ Vdrop, where Vint is the intermediate voltage measured on the
common node of R13 and R14, and Vdrop is the voltage drop across the
cord serial resistor.
SMPS with output cord
Q1
NMOSFET
1A, 600V
U3
OPTOCOUPLER
D1
D2
2 x 1N4148
R4
1.5
R3
1K
1/2W
C4
120pF
600V
3 1
42
BR1
BRIDGE
To cord (+)
To cord (-)
SecondaryGND
R2A
430k
SMT
90V-270V AC
Snubber Network
Patented
TX1 EI/EE FERRITE
13mm Noise-Canceling Type
LP=1.5mH, LS=1.5microH
+
C5
100uF
16V
105°C
+
C3
10uF
16V
+
C1
4.7uF
400V
D3
Schottky
1A - 60V
L1
330uH
+
C2
4.7uF
400V
R2
390k
R6
23.7k
1%
R7
25.5k
1%
OUTPUT
INPUT
R8
3.3
VCC
1
VSENSE
2
VCOMP
3
OPTO
4
ISENSE 8
N/C 7
ICOMP 6
GND 5
U2
IPS25
R9
30k
C9
0.068uF
R1
10k
+
C6
470uF
16V
105°C
C10
220pF
R5
330k
PrimaryGND
R10
4.3k
R10A
1.5k
R11
100k
R12
10Meg
1/4W
PDRV
1
ISENSE
2
VCC
3
RBIAS
4
NDRV 8
GND 7
OPTO 6
OVRV 5
U1
IPS15
C1
220pF
R13 R14
C8
0.068uF
Positiv e f eed-back f or cord
serial resistance compensation
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DatasheetRev.12 - Low cost, High Efficiency, Low Power off-line Switcher
© Copyright 2003-2007 - ASIC Advantage, Inc. – All rights reserved - Revision 12 – April 02, 2007 11 / 15
ADDITIONAL RECOMMENDATIONS
:
For best results in low power off-line SMPSs with the IPS15, the following MOSFET features are recommended:
- Low gate charge (max 50 nC).
- 400 V breakdown voltage for domestic use (USA / Japan).
- 600V breakdown voltage for European use (800V when transformer leakage inductance is very small).
- 1, 2 or 3A depending on the maximum output power.
Examples of suitable MOSFETS:
- IXYS PolarHT and Polar HV MOSFET series: IXTY1R4N60P, IXTY2N60P, IXTY3N60P
- Fairchild MOSFET series: FQPF1N60, FQPF 2N60, FQPF 3N60.
- Infineon COOLMOS
TM
series: SPD01N60S5, SPD02N60S5, SPD03N60S5.
- Motorola MOSFET series: MTP1N60, MTP2N60, MTP3N60.
- SGS-Thomson MOSFET series: STD1NB60, STD2NB60, STD3NB60.
- Etc…
Notes:
- Due to the rapid evolution of MOSFET technologies, please check for current models when designing a new
SMPS.
- PolarHT and Polar HV are trademarks of IXYS corporation
- COOLMOS
TM
is a trademark of Infineon.
TRANSFORMER CHARACTERISTICS
:
(a) Transformer design:
E-core with suitable gap to prevent saturation or distributed-gap toroid. Primary inductance of 1.5 mH is very
typical.
Turn ratio = 9 for 220V input or universal 85V – 265V.
Turn ratio = 7 for 100-120V AC input (Japan and USA)
(b) Transformer phasing:
Check the phase as indicated in figure 1 , 5 and 6
. Also refer to application
notes AN-IPS-01 and AN-IPS-02.
SNUBBER NETWORK
:
With reference to figure 1, R2 provide the start-up current for the chip. C3 is being charged through R2. Once the
chip supply voltage is high enough, the gate drive starts and the chip is then powered by the modified snubber
network patented by our company.
The snubber values may have to be optimized for different specific operating conditions:
- R3 could be reduced to 100 ohms and sometimes eliminated.
- C4 could be increased to 200pF and sometimes more.
Depending on the characteristics of the transformer, essentially leakage inductance and distributed capacitance, the
snubber network shown in figure 1, may not be efficient enough to reduce the voltage spikes when operating at 20W
or above. Please refer to applications notes AN-IPS-01 and AN-IPS-02 design tips or EMI reduction techniques, or
feel free to contact our technical support for assistance.
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DatasheetRev.12 - Low cost, High Efficiency, Low Power off-line Switcher
© Copyright 2003-2007 - ASIC Advantage, Inc. – All rights reserved - Revision 12 – April 02, 2007 12 / 15
POWER SHUT-DOWN SOLUTIONS for STAND-BY REQUIREMENTS
:
For low-power stand-by requirements, the primary circuitry can be shut-down by pulling the IPS15 VCC pin
“LOW” through a 100Ω resistor.
This can be easily done using a:
Simple switch
PNP transistor
NPN transistor
SHUT-DOWN SOLUTIONS
Figure 6
Solution 1:
simple switch, close = off
100Ω resistor
mandatory
Solution 2:
PNP transistor, low = off
(low = less than 4V)
100Ω resistor
optional
Solution 3:
NPN transistor, high = off
100Ω resistor
optional
close = off
100
Ω
100
Ω
low = off
high = off
100
Ω
When the "LOW" state is released, the VCC is naturally re-established, re-activating the IPS15.
Q1
NMOSFET
1A, 600V
U2
OPTO-NPN
R6
100
D2
1N4148
D3
1N4148
R4
1.2
R3
470
1/2W
C4
100pF
1KV
3 1
42
BR1
BRIDGE
L1
4.2 uH OUT+
OUT-
SecondaryGND
PrimaryGND
R2
820k
110V AC
Snubber Network
Patented
TR1
TRANSF-1P1S
LP= 1.5mH, LS=1.5microH
+
C5
470uF
16V
+
C6
220uF
16V
+
C3
22uF
16V
+
C1
10uF
250V
D4
Zener
9.2V
D1
Schottky
5A - 60V
R5
330k
R1
4.3k
R1A
1.5k
R8
100k
R7
10Meg
1/4W
PDRV
1
ISENSE
2
VCC
3
RBIAS
4
NDRV 8
GND 7
OPTO 6
OVRV 5
U1
IPS15
C2
220pF
SHUT- DOWN
SOLUTIONS
1,2 or 3
332.134 L A P'N‘ 8-Pin Plastic DIP .260 (6.60) .240 (6.10) [$11707 (1 7a) 04511.14) .310 (7.67) .._.400 (10.16) 29° (7'37) .345 (3.54) .200 (5.0a) — .140 (3.55) L j_1_040 (1.02) .020 (0.51) .015 0.33 o . .150 (3.311 1 .008 10.201 3 MIN .1 1 5 (2.92) 4L 1"} (2 79) .090 (2 29) _—| L- .400 (10.16) .310 (m7) 022 (0 56) 015 (o as) —F all— .050 (1.21) TYP. PIN I 1ndicaled by dot and I or meed edge ‘ 8 Pin-SOIC .157 (2.99) 244 (5.20) .150 (3.31) .228 (5.79) 197 (5. 00)__ r139 (4. 80). _-_-_-_ _L *1 r— 1 .016 (0.46) 010 (0 25) .014 (0.36) 004 (O 10) é a. .053 (1. 35) 010 (o. 25) 5 MAX T 007 (o 13) .050 (1. 27) .016 (0.40]
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DatasheetRev.12 - Low cost, High Efficiency, Low Power off-line Switcher
© Copyright 2003-2007 - ASIC Advantage, Inc. – All rights reserved - Revision 12 – April 02, 2007 13 / 15
PACKAGE DIMENSIONS
PLASTIC DIP-8
PLASTIC SOIC-8
Nola Nolez ate ExamgleofV rking n—u u—u n—u u—u n—1 n—1 u—u n—u |_: |_| |_| |_| |_: |_: |_: |_: Note
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DatasheetRev.12 - Low cost, High Efficiency, Low Power off-line Switcher
© Copyright 2003-2007 - ASIC Advantage, Inc. – All rights reserved - Revision 12 – April 02, 2007 14 / 15
ORDERING INFORMATION
Part-Number
Example of Marking
(Note : For production with a new date code, since January 2006, the package type does not appear anymore on package
marking)
This ordering information is for commercial and industrial standard IN-PLUG® controllers ONLY. For custom controllers or for
automotive and military temperature ranges, call AAI’s sales representative.
IN-PLUG® Controller Series
Flyback
Feedback
PFC
Push-Pull
LED Driver
Controller Type
Flyback: 10 series
Feedback: 20 series
PFC: 100 series
Push-Pull: 200 series
LED Driver: 400 series
“H” with hiccup overload
protection
ROHS + Pb-Free
Tape and Reel
TR : Tape & Reel
TU : Tube
Note1 : Default or not specified
is « tube ».
Note2 : Does not appear on
package marking.
Temperature Range
C : Commercial (0, +70°C)
I : Industrial (-40°C. +85°C)
Note : Default or not specified is <commercial>
Package Type
D : DIP8
SO : SOIC8
(For production with a new date code, after January
2006, the package type will not appear anymore on
package marking)
IPS XXXH C – YY – G-LF - TR
Non-Green Package Green ROHS + Pb-Free Package
AAI G-LF
IPS15HC
YYWW
AAI
IPS15HC
YYWW
LIMITED WARRANTY CRITICAL APPLICATIONS LETHAL VOLTAGES INTELLECTUAL PROPERTY RIGHTS AND PROPRIETARY DATA TRADEMARKS AND PATENTS PROTECTION FOR CUSTOM lN-PLUG® SOLUTIONS COMPLIANCE WITH LAWS TITLE AND DELIVERY LATEST DATASHEET UPDATES WORLDWIDE REPRESENTATIVES COPYRIGHTS
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DatasheetRev.12 - Low cost, High Efficiency, Low Power off-line Switcher
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The following is a brief overview of certain terms and conditions of sale of product. For a full and complete copy of all
the General Terms and Conditions of Sale, visit our webpage http://www.asicadvantage.com/terms.htm.
LIMITED WARRANTY
The product is warranted that it will conform to the applicable specifications and be free of defects for one year.
Buyer is responsible for selection of, use of and results obtained from use of the product. Buyer indemnifies and
holds ASIC Advantage, Inc. harmless for claims arising out of the application of ASIC Advantage, Inc.’s products to
Buyer’s designs. Applications described herein or in any catalogs, advertisements or other documents are for
illustrative purposes only.
CRITICAL APPLICATIONS
Products are not authorized for use in critical applications including aerospace and life support applications. Use of
products in these applications is fully at the risk of the Buyer. Critical applications include any system or device
whose failure to perform can result in significant injury to the user.
LETHAL VOLTAGES
Lethal voltages could be present in the applications. Please comply with all applicable safety regulations.
INTELLECTUAL PROPERTY RIGHTS AND PROPRIETARY DATA
ASIC Advantage, Inc. retains all intellectual property rights in the products. Sale of products does not confer on Buyer
any license to the intellectual property. ASIC Advantage, Inc. reserves the right to make changes without notice to
the products at any time. Buyer agrees not to use or disclose ASIC Advantage Inc.’s proprietary information without
written consent.
TRADEMARKS AND PATENTS
- IN-PLUG® is a registered trademark of ASIC Advantage, Inc.
- AAI’s modified snubber network is patented under the US Patent # 6,233,165. IN-PLUG® Customers are granted
a royalty-free licence for its utilization, provision the parts are purchased factory direct or from an authorized agent.
PROTECTION FOR CUSTOM IN-PLUG® SOLUTIONS
When AAI accepts to design and manufacture IN-PLUG® products to Buyer’s designs or specifications, buyer has
certain obligations to provide defense in a suit or proceeding claiming infringement of a patent, copyright or trademark
or for misappropriation of use of any trade secrets or for unfair competition.
COMPLIANCE WITH LAWS
Buyer agrees that at all times it will comply with all applicable federal, state, municipal, and local laws, orders and
regulations. Buyer agrees to comply with all applicable restrictions on exports and re-exports including obtaining any
required U.S. Government license, authorization, or approval. Buyer shall pay any duties, levies, taxes, brokerage
fees, or customs fees imposed on the products.
TITLE AND DELIVERY
All shipments of goods shall be delivered ExWorks, Sunnyvale, CA, U.S.A. Title in the goods shall not pass to Buyer
until ASIC Advantage, Inc. has received in full all amounts owed by Buyer.
LATEST DATASHEET UPDATES
For the latest datasheet updates, visit our web page: http://www.in-plug.com/datasheets.htm.
WORLDWIDE REPRESENTATIVES
To access AAI’s list of worldwide representatives , visit our web page http://www.in-plug.com/representatives.htm
COPYRIGHTS
Copyrights and all other proprietary rights in the Content rests with ASIC Advantage Inc. (AAI) or its licensors. All
rights in the Content not expressly granted herein are reserved. Except as otherwise provided, the Content published
on this document may be reproduced or distributed in unmodified form for personal non-commercial use only. Any
other use of the Content, including without limitation distribution, reproduction, modification, display or transmission
without the prior written consent of AAI is strictly prohibited. All copyright and other proprietary notices shall be
retained on all reproductions. ASIC Advantage INC.
1290-B Reamwood Ave, Sunnyvale California 94089, USA
Tel: (1) 408-541-8686 Fax: (1) 408-541-8675
Websites: http://www.in-plug.com - http://www.asicadvantage.com

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