LMK1D2106/8 Dual Bank 6-/8-Channel LVDS Buffers

Texas Instruments' LMK1D2106 and LMK1D2108 clock buffers distribute two clock inputs (IN0 and IN1) making a total of sixteen pairs of differential LVDS clock outputs (OUT0 to OUT15) for the LMK1D2108 and twelve pairs of clock outputs (OUT0 to OUT11) for the LMK1D2106 with minimum skew for clock distribution. Each buffer block consists of one input and a maximum of six (LMK1D2106) or eight (LMK1D2108) LVDS outputs. The inputs can be LVDS, LVPECL, HCSL, CML, or LVCMOS.

The buffer devices are designed for driving 50 Ω transmission lines. When driving the inputs in single-ended mode, apply the appropriate bias voltage to the unused negative input pin. Using the control pin (EN), the output banks can be enabled or disabled. If this pin is left open, both bank outputs are enabled. If the control pin is switched to logic 0, the bank outputs are disabled (static logic 0). If the control pin is switched to logic 1, the outputs of one bank are disabled while the outputs of the other bank are enabled.

The LMK1D2106/8 supports a failsafe function and incorporates an input hysteresis which prevents random oscillation of the outputs in the absence of an input signal. The device operates in a 1.8 V, 2.5 V, or 3.3 V supply environment and supports an ambient temperature range of -40°C to +105°C.