The high performance of these devices is a product of the innovative AVR32 CPU and the internal data bus structure. The AVR32 CPU has a full DSP instruction set extension that accelerates digital filtering operations, and an event handler that can perform very rapid switches between tasks and interrupt event handlers. Also, the AVR32 CPU has a branch predictor that determines whether a conditional branch in the instruction flow of a program is likely to be taken or not. Branch predictors are crucial in today's modern processors for achieving high performance. They allow processors to fetch and execute instructions without waiting for a branch to be resolved. The AVR32 data bus structure consists of a multi-layer data bus that allows multiple communications to take place simultaneously without adding wait states. Peripherals have their own data bus layers where they can perform DMA operations direct to and from memory without feeding the data through the CPU.