The Digital Input Disable Register (DIDR) is available in all picoPower devices. Applying a voltage to the input buffer will result in leakage current. Typical leakage with an input voltage equal to Vcc/2 on is ~400uA per pin (ATtiny26). This will not be seen as an input current leakage but as an increase in the overall current consumption. On normal digital IO this is not a problem. However, when using a pin for the ADC or the analog comparator, Vcc – GND is the valid area and the digital IO buffer should be disconnected. Note that the ADC is not able to disconnect the digital IO buffer itself because it only knows the present ADC channel to use, and not which additional channels are used as ADC. Therefore, do not use DIDRs on input logic which is needed for detecting wake-up conditions, since when the DIDR is enabled, the corresponding PIN register bits always read ’0’.